Server Highlights From Financial Analyst Day
Today AMD hosted our annual Financial Analyst Day in our Sunnyvale, CA headquarters. The Financial Analyst Day is our opportunity to give the financial community a peek into what next year (and the year after) have in store for AMD. As you can imagine, “Bulldozer” was a key topic for discussion, both in the main session as well as the server breakout.
To make sure that all of you are caught up on the latest news, here’s a summary of what we disclosed to the analysts:
Product Schedules – This is the most asked question that I get. Today we gave granularity down to the quarter. We expect to launch the client version of “Bulldozer” (code named “Zambezi”) in Q2 2011. The server products (“Interlagos” and “Valencia”) will first begin production in Q2 2011, and we expect to launch them in Q3 2011.
Die size – Because we are moving to a 32nm process we will be delivering these products in a smaller die than current 45nm products. This is good news for both the yields and manufacturability as well as the power. Part of the beauty of the “Bulldozer” core is that it allows for smaller overall die space. As a matter of fact, we are able to put 8 total cores in a piece of silicon that is smaller than our current 6-core dies.
8-core G34 Server Model – Previous we have talked about 16-core and 12-core models but customer discussions over the past year have convinced us that there is also a need for an 8-core G34 part. This part will feature higher clock speed and four channels of memory. It will be a very interesting part for certain financial and HPC applications that require a high clock speed as well as massive memory bandwidth.
L2 and L3 cache – I have been saying for a long time that we would hold cache details until launch, but there were some compelling reasons to include this information in some of the compiler updates. Having the proper cache sizes helps in the optimization of applications, so we decided that helping our customers and ISV partners optimize ahead of the release outweighed the competitive concerns. Each module will have a massive 2MB L2 cache for the 2 integer cores to share and you’ll see an 8MB L3 cache shared per die (16MB on the 16-core “Interlagos” processor.)
Turbo CORE – We have disclosed that we would include AMD Turbo CORE technology in the past, so this should not be a surprise to anyone. But what is news is the uplift – up to 500MHz with all cores fully utilized. Today’s implementations of boost technology can push up the clock speed of a couple of cores when the others are idle, but with our new version of Turbo CORE you’ll see full core boost, meaning an extra 500MHz across all 16 threads for most workloads.
C6 power state – Since Bulldozer is designed to fit into the same power/thermal envelope as our current AMD Opteron™ 6100/4100 series processors we obviously have some new power tricks up our sleeve. One of these is the new CC6 power state, which powers down an entire module when it is idle. That is just one of the new power innovations that you’ll see with Bulldozer-based processors.
Memory Throughput increase – We have talked about greater memory throughput for the newly redesigned memory controller, but today we put some numbers behind that statement. We are anticipating about a 50% increase in memory throughput with our new “Bulldozer” integrated memory controller. About 30% of that increase is from enhancements to the circuits and designs. The other 20% is from support of higher speed memory. I’ll leave memory speeds for launch, we need some secrets, right?
That should catch you up with what we disclosed today.
So, what is left? Well, there are still a lot of details left that we are not sharing at this point. With such a revolutionary design there are plenty of other secrets left.
And, while I am at it, let me pre-empt the 3,715 questions and emails I will receive this week. We never disclose information such as the actual launch dates, benchmarks, partner support, detailed memory support, pricing (as well as some other detailed product specs), until launch, so please be patient.
John Fruehe is the Director of Product Marketing for Server/Workstation products at AMD. His postings are his own opinions and may not represent AMD’s positions, strategies or opinions. Links to third party sites are provided for convenience and unless explicitly stated, AMD is not responsible for the contents of such linked sites and no endorsement is implied.
POSTED IN: AMD Opteron, Bulldozer
TAGS: AMD Opteron, Bulldozer


Seeing your site I’m confident i might possibly know you from school, could happen to visit Tx Tech? In the event you did remember to shoot me an email so we are able to catch up it’s been quite a while! Anticipate talking to you and pray most will be well with you.
I did visit texas tech several years ago. Actually, on the day that Bobby Knight was named coach of the basketball team. Strangely, I was also at IU on the day he was fired there.
“up to 500MHz with all cores fully utilized”
Let me see if I understand this correctly:
If the power consumption and temperature are in the acceptable levels, the Turbo CORE will increase all cores clock by 500MHz, right?
But if with all cores working in turbo the power consumption/temperatures go beyond the limits, but with just 4 cores using turbo core the temp and power stay good, then it will use the turbo core in just this 4 cores or will be disabled at all? It’s all or nothing?
I guess it’s not… just asking to know it for sure
Turbo CORE is designed to take advantage of the incremental clock speeds that are available when a processor is not using all of the power that is allotted to it. When we rate processors we have to do it on the “worst case scenario” and not all workloads run at those levels of power consumption. So, if the workload is not consuming all of the power, it can raise the clock speed.
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