Whirring fans, hot air, oversubscribed datacenter power grids, short battery life … all of these are symptoms of our computers consuming too much power and generating too much heat.  But while we are unhappy with these symptoms of excess power consumption, we typically aren’t ready to deal with a sluggish, unresponsive computer to solve it.  We want all the performance of a high power processor without the nasty power-related side effects that tend to come with it.  AMD’s “Bulldozer” CPU core design being discussed this week at ISSCC is all about breakthroughs in power efficient design that enable both high performance and cool, quiet operation.  The goal of every feature and aspect of the processor has been to enable computer designs which provide that snappy performance we all want without the attending downsides of high power consumption.

Just how important the CPU is to a computer’s power efficiency can be seen by looking at the power breakdown of a fully loaded computer system as shown by AMD internal measurements below:

Obviously, if we want cooler more energy efficient computers, it all starts with a well designed CPU which produces 50% of the heat.

The Bulldozer core implements numerous improvements that target super-efficient computation in all aspects of the design.  These features build on and extend the foundational innovations that were discussed as part of the “Llano” disclosures made a year ago and covered in a prior blog.

• Fully power gating the core to essentially zero power when not in use

• Sharing components in the dual core design (instruction fetch, decode, L2 cache, FP) to make more efficient use of them while still delivering the performance of a true dual core.  This is sort of like the efficiency of a duplex home design where heat, plumbing, foundation and electrical infrastructure can all be shared, but the structure still provides independent homes for two families.

• Optimizing the low level circuits for maximal efficiency at all levels.  For instance low-power flip-flop design shown in paper 4.5 yesterday at ISSCC provides innovative power reductions for one of the biggest power consuming circuits in the core.  The clock grid (another big power sink) builds on the power efficiencies of past designs, and adds more improvements.  Perhaps most importantly, the grounds-up design opportunity enabled an unprecedented level of clock gating (see figure below from the paper) to reduce power waste as shown in the graph below.  Retrofitting a design to add logic to turn clocks off when circuits aren’t used is a time consuming and error-prone process.  The Bulldozer team designed these in from the beginning which enabled the inclusion of over 30,000 individual clock enables to be used.

• And finally, a next generation AMD Turbo CORE technology implementation that provides maximum compute speed when required, and throttles back to maximum efficiency when appropriate.  Bulldozer implements a significantly more aggressive version of this capability than “Llano” with more details to be disclosed in the future.

Putting all these improvements together means the high performance computing engine that is the Bulldozer core will enable the best of both worlds: great computing speed without the costly and unpleasant side effects of high power consumption.  Initially AMD plans to deploy this core in desktop and server products, but it may provide the foundation for efficient processors across AMD’s product line for many years to come.

Samuel Naffziger is a Corporate Fellow at AMD. His postings are his own opinions and may not represent AMD’s positions, strategies or opinions. Links to third party sites, and references to third party trademarks, are provided for convenience and illustrative purposes only.  Unless explicitly stated, AMD is not responsible for the contents of such links, and no third party endorsement of AMD or any of its products is implied.